Originally Posted by underwurlde
Perhaps he worked out what the protocol used on the EIB bus is between the Southbridge and the Starship2.
I wouldn't be surprised if it was NOResque in other words making the two NANDs 'look' like (in hardware) a NOR chip to the SouthBridge...
...my thinking here is if Sony removes the 2 NANDs & removes the Starship2 and instead bungs in a NOR instead, therefore no need to change the SouthBridge <- it remains the same device regardless of NAND / NOR. = cheaper, easier to manufacture PS3 hardware.
Or instead of working out this magical protocol, worked out what those test pads were, i.e. basically assumed what I have above and then sussed out all the control test-pads, Address test-pads and data test-pads. Once done, connected up a NOR hardware flasher, viola?
Wild stab in the dark all that of course.
he does say the starship does make the 2 nands work as a nor chip
so what your saying is right 1 nor = 1 starship + 2 nands hardware wise.
what got my interest in this was that he said he has dumped / flashed by connecting a nor flasher to the nor type test points and the starship chip removes the bad blocks (ie it must re-sort them on the fly) and no need for de-interleaving
if we can get the correct points mapped then this would solve bad flashing on nand consoles